This invention relates generally to digital communication systems, and more particularly to a communication system using coding of the digital input to generate a coded input having a greater number of bits than the digital input. Forward Error Correction (FEC) operates in this manner, and convolutional coding is one example of forward error correction system.
In a convolutional coding system, a digital input is coded by a convolutional coding circuit so that for every number k of bits inputted into the convolutional coding circuit, a greater number n of bits is provided as output. A coding rate for the convolutional coding circuit is defined as the ratio of the number k of input bits to the number n of coded output bits. Thus, for example, the coding rate is xc2xd when for each bit inputted into the convolutional coding circuit, two output bits result. This increase in the number of bits results in a decrease in the signal bit rate.
Various conventional convolutional coding algorithms are available, each with a specific coding rate. It may be desirable to adjust the coding rate so that the data rate for the output of the circuit matches the requirements for the remainder of the communication circuitry including the communication channel. For example, in order to increase the code rate it is known to pass the convolutional coded output through a puncturing circuit which includes a deletion pattern for removing selected bits from the convolutional coded output. Alternatively, in order to reduce the code rate it is possible to pass the output through a repetition circuit for repeating selected bits of the output.
U.S. Pat. Nos. 5,668,820 and 5,511,082 each disclose a digital communication system having a punctured convolutional coding system of the type described above.
The invention is particularly concerned with a coding device which has a coded output and in which a number of words of the coded output signal are interleaved. Interleaving is a well known technique used for improving the error performance of a transmission system. There is an increasing requirement for flexibility in communication systems, for example the ability to handle data having different characteristics, such as bit rate, interleaving depth, variable rates of data etc. The use of a conventional variable rate convolutional coding circuit (or other FEC coding circuit) in a coding device having interleaving of the coded output requires the interleaving circuitry to be adaptive to the output bit rate of the convolutional coder. The applicant has therefore appreciated that the interleaving of data should be performed after coding, but before rate matching of the data stream (i.e. before puncturing or bit repetition). However, this introduces the problem that the puncturing or bit repetition performed by the rate matching circuit may not be appropriate for the bit structure generated by the interleaving circuit. For example, there is the possibility that the bits selected for puncturing bits provide information concerning the same or adjacent bits in the digital input. This increases the probability of error in the transmission in respect of that part of the input signal.
According to a first aspect of the invention there is provided a rate matching circuit for adjusting the number of bits in a data block, the data block comprising a plurality of interleaved words generated by the action of an interleaving circuit on a coded output generated by the action of a coding circuit on a digital input, the coded output having a greater number of bits than the digital input, the rate matching circuit having means for adjusting the number of bits in the data block using a rate matching pattern to provide data bits for transmission during respective frames of a transmission channel, characterised in that means are provided for selecting the rate matching pattern depending on the characteristics of the coding circuit and of the interleaving circuit.
In accordance with the present invention, the interleaving circuit does not need to be adaptive, because it is selected for interface with a coding circuit having a fixed code rate or a limited number of rates for a variable rate data source. The puncturing circuit or repeating circuit then operates on the interleaved words in order to adjust the output bit rate to be appropriate for transmission over the transmission channel. The deletion or repetition pattern is then selected in such a way that (i) in the case of deletion of bits, the puncturing has the least detrimental effect to the digital circuit) which has been coded and interleaved before input to the puncturing circuit or (ii) in the case of repetition of bits, the repetition has the most beneficial effect for the output for transmission and is not concentrated at one portion of the digital input.
Also, according to the invention, the single puncturing or repeating stage, which effects rate matching of the input signal, can be used to control the transmission quality of the input signal (by altering the forward error correction characteristics) as well as manipulating the output bit rate to be suitable for subsequent transmission, for example to match the maximum bit rate of the transmission channel. This avoids the need for separate rate matching stages for quality of service requirements and for channel capacity consideration.
The pattern for each interleaved word within the data block may be offset with respect to the adjacent interleaved word or words within the block. For a block interleaving circuit, the targeting of different bits within adjacent words of the interleaved block is one way of preventing adjacent bits from the coded output word from being targeted by the repetition/deletion pattern.
The pattern may be selected as a function of the interleaving depth of the interleaving circuit.
The coding preferably comprises convolutional coding, and the deletion or repetition pattern will take into account, for example, the constraint length of the convolutional coding circuit.
The rate matching circuit enables the output bit rate to be controlled, and this has particular application when a number of digital inputs are to be multiplexed on to a single carrier. For this purpose, a communication system may comprise a plurality of coding devices, each for coding a respective digital input, and a multiplexer for combining output data words of the coding devices for subsequent transmission by the transmission system on the single transmission channel. The outputs of different coding devices may be selected to have different data rates, with the combined data rate corresponding to the channel capacity of the transmission channel.
According to a second aspect of the present invention there is provided a coding device comprising a rate matching circuit made in accordance with the present invention, further comprising an interleaving circuit and a coding circuit.
According to a third aspect of the present invention there is provided a decoding device for decoding a signal coded by a coding device of the invention, and comprising a data reconstruction circuit for reconstructing the interleaved words, a de-interleaving circuit and a channel decoder.
According to a fourth aspect of the present invention there is provided a communication system comprising a transmitter having a coding device of the invention and a transmission system for transmitting the output data words of the coding device. A receiver of the system includes the decoding device.
According to a fifth aspect of the present invention there is provided a method of operating a rate matching circuit to adjust the number of bits in a data block, the data block comprising a plurality of interleaved words generated by the action of an interleaving circuit on a coded output generated by the action of a coding circuit on a digital input, the coded output having a greater number of bits than the digital input, the rate matching circuit adjusting the number of bits in the data block using a rate matching pattern to provide data bits for transmission during respective frames of a transmission channel, characterised by selecting the rate matching pattern depending on the characteristics of the coding circuit and of the interleaving circuit.